Bachelor and Master Theses

Title: Master Thesis - Writing a PowerPC assembler to ALF translator in cooperation with world-leading WCET tool providers
Subject: Computer Science
Level: Advanced
Description: Work description:
Reliable worst-case execution time (WCET) bounds of computer programs are a crucial when designing and verifying real-time systems, and are conceptually a basis for most of the research performed within the real-time research community.

SWEET is a tool for WCET analysis developed at Mälardalen University (MDH), and among the leading WCET analysis tools in the world. SWEET takes as input an intermediate code format called ALF, upon which it performs various type of program analyses. ALF has, similar to most type of programming languages, a well-defined textual format. CRL2 is a data format maintained by the AbsInt company, who develops the aiT WCET analysis tool. CRL2 is mainly used to represent various type of assembler code formats with associated analysis results. The CRL2 format is accessible through a C or C++ API, and an initial prototype implementation for accessing some of the required parts already exists within the SWEET project.

The MSc work consists of writing a translator from CRL2's representation of PowerPC assembler code to ALF. That is, writing a C or C++ program which (a) extracts required information on the PowerPC code representation from the CRL2 API, (b) makes a semantical interpretation of the information in terms of ALF constructs, (c) and outputs the resulting ALF code to a file. SWEET gives its analysis results in relation to the data and code constructs found in ALF. To allow SWEET's analysis results to be given back to CRL2, (d) a mapping between CRL2's and ALF's different code and data constructs should also be maintained.

Detailed work description:
The work to be performed consists of four major steps:

1. Read data format documentation and learn about WCET analysis tools.
* Learn about the CRL2 format.
* Learn about the PowerPC assembler code format.
* Learn about the ALF format.
* Learn how to use the aiT and SWEET WCET analysis tools.
* If time allows the student can make a travel to Saarbrucken for
taking a course in the aiT WCET tool (financed by MDH).

2. Make a semantical interpretation of CRL2 PowerPC assembler code constructs in terms of ALF code and data structures. Basically, for each type of PowerPC assembler instruction or data construct found in the CRL2 format a corresponding ALF code or data construct should be created. Moreover, some PowerPC hardware resources, such as registers and different memory areas, need to be represented by some ALF data structures.

3. Write code to extract information from the CRL2 PowerPC code representation and convert it to ALF. Basically, write C or C++ code which uses the CRL2 API to extract the PowerPC instructions and data, makes an interpretation of the extracted information as given in step 2, and outputs the corresponding ALF code. To allow SWEET's analysis results to be given back to CRL2, a mapping between the different constructs in the CRL2 and ALF formats should also be maintained.

4. Evaluate the implementation on some benchmark programs and write a MSc thesis report. The report should be written in English.

More material to study:
* Homepage of SWEET and MDH WCET research group:
* PowerPC processor and assembler code manual:
* Description of the CRL2 format:
* Description of the ALF format:
* Homepage of the aiT WCET analysis tool:

Prel. end date: 2009-09-15
Student: Deepthi Devaki A.R
IDT supervisor: Andreas Ermedahl, +46-21-107334
Examinator: Bjrn Lisper
Bjrn Lisper, +46-21-151709
Misc: This MSc thesis work has a lot of similarities with the NECV850E to ALF translator MSc thesis work. Thus, two students can work closely together on these two works.

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2010-11-29, 10:38

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