Bachelor and Master Theses

Title: Analyzing Real-Time Traffic in Wormhole-Switched On-Chip Networks
Subject: Computer Science
Level: Basic or Advanced (contact supervisor)
Description: Many-core processors are gaining more and more attention due to their high computing capability along with limited hardware cost. Network-on-Chip (NoC) is a promising communication solution for many-core processors as well as System-on-Chips (SoC) in general. The initial motivation of the NoC design is to improve the average network throughput. However, such a consideration is not sufficient to support hard real-time traffic, where the worst-case scenarios should be concerned. In order to provide guarantees to real-time traffic over NoCs, two approaches are commonly used: (1) analyzing the worst-case response time of message flows; (2) modifying hardware architecture in order to provide control of message transmissions. This thesis focuses on the first approach.
A number of analysis approaches regarding NoCs have been proposed in the literature. However, there is no existing analysis tool which can support multiple NoC architectures and can provide convenient interactions with users. Therefore, the main target of the thesis is to implement and compare multiple time analysis approaches regarding different NoC architectures. Based on the developed tool, a number of experiments need to be generated to investigate how different network parameters (e.g. bandwidth, flow routes, number of virtual-channels) affect the schedulability of given flow sets. The derived observations or conclusions can help system designers to choose suitable NoC configurations.
The thesis may include the following tasks:
1. Study the backgrounds related to wormhole-switched NoCs.
2. Study the state-of-the-art related to the time analysis for NoCs.
3. Develop an analysis tool for NoCs with Graphical User Interface.
4. Generate extensive experiments to investigate the given network parameters, and conclude observations for system designers.
5. Write a thesis report and provide the complete source code of the implementation.
Prel. end date: 2016-05-25
Student: Shuyang Ding
Student: Taodi Wu
IDT supervisor: Meng Liu, +46-21-107353
Examinator: Thomas Nolte
Thomas Nolte, +46-21-103178
Misc: This thesis can be 30 pt for one student, or 15 pt for two students.

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2016-05-25, 22:36

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