Bachelor and Master Theses

Title: Automatic Test Generation and Mutation Analysis using UPPAAL SMC
Subject: Computer Science
Level: Basic
Description: The growing complexity of embedded systems requires new techniques that are able to support testing of extra-functional properties like resource usage (e.g., energy, bandwidth and memory). UPPAAL SMC is a tool that can handle this kind of properties and recently has been extended for test generation and fault detection analysis. This method lacks a way of automatically extracting test suites that can be used for test execution and evaluation in terms of mutation analysis. The research goal is to investigate how to automatically generate and select tests (assuming mutation analysis) by using UPPAAL SMC, and evaluate the applicability of our proposed solution on an industrial case study.

Research Questions:

How to generate test cases for testing resource consumption in embedded systems by using UPPAAL SMC?

Using mutation analysis as the underlying technique how to select test cases for maximizing fault detection?

Are the proposed solutions applicable on an industrial system?

The aim of the thesis is to propose a method and implement and evaluate a tool for automatic test generation and test selection using mutation analysis based on UPPAAL SMC.

We need to study how to automatically extract suitable test cases from UPPAAL SMC’s simulation traces, automatically execute these test cases in order to perform mutation analysis, and compare the difference between the actual output signals with the expected ones in order to create a mutation score for each test. If using mutation analysis for test selection is feasible then the method and solution will be proposed before starting the solution implementation. The resulting method will automatically determine which generated tests are detecting certain injected faults. The implementation of the solution will be a toolchain with UPPAAL SMC as the core tool. A case study will also be presented on the final solution to demonstrate the usefulness of the method. This method will be applied on a relevant industrial use case and the results will be analysed and empirically evaluated. The outcome of this thesis will be an automated method and solution for test generation, extraction and mutation analysis that would be useful for testing extra-functional properties of embedded system models.
Prel. end date: 2017-06-04
Presentation date: 2017-06-01
Student: Jonatan Larsson
IDT supervisor: Raluca Marinescu,
Examinator: Cristina Seceleanu
Cristina Seceleanu, +46-21-151764

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