Title: | SysML-based Automated Test Generation for PLC Industrial Control Software |
Subject: | Computer science, Embedded systems, Software engineering |
Level: | Advanced |
Description: |
This thesis work involves the implementation of a technique for test generation based on SysML activity diagrams for PLC industrial control software. The technique will be evaluated in terms of real fault detection and time to create test cases. Supervisor(s): Examiner: Eduard Enoiu (eduard.paul.enoiu@mdh.se) |
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End date: | |
Prerequisites: | good knowledge of programming and testing; UML and SysML knowledge. |
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Company contact: | ABB Marine and Ports |